When a USB device is plugged in, it is enumerated by the host controller driver using control pipes and assigned a device address ( 1 to127). USB设备插入时,主机控制器使用控制管道来枚举它并给它分配设备地址(1到127)。
From here, you can set up the Network Interface Controller ( NIC) with the appropriate IP information, address, netmask, gateway, and nameserver. 在该对话框中,您可以为网络接口控制器(NetworkInterfaceController,NIC)设置适当的IP信息、地址、网络掩码、网关和名称服务器。
Updating the Baseboard Management Controller ( BMC) firmware and setting an IP address 更新基板管理控制器(BMC)固件和设置IP地址
Controller bus address register 控制器总线地址寄存器
Application and Research of Interference SAR on Terrain Contour Matching Guidance Mismatch between the floppy disk sector ID field and the floppy disk controller track address. 干涉测高技术在地形匹配制导中的应用研究软盘扇区id字符域与软盘控制器磁道地址不匹配。
Mismatch between the floppy disk sector ID field and the floppy disk controller track address. 软盘扇区id字符域与软盘控制器磁道地址不匹配。
From the point of view of the device, say the floppy disk controller, it will see only the address space that its control registers are in ( ISA), and not the system memory. 从设备的角度来看,比如说软盘控制器,它只能看到在ISA总线上的控制寄存器而不是系统内存。
In the "talk" example, the controller sends the address and command-to-talk to the talker, by using ATN and the data-bus. 在说的例子中,控制器利用ATN和数据总线把地址和说命令送给说者。
The controller comprises an address generator having a plurality of base address generators, and a read/ write control circuitry. 控制器包含一具有多个基本位址的位址产生器,和一读/写控制电路。
This system fully embodies the feature of TDM of address and data lines of CAN controller, resolving the problem caused by seperation of DSP address line and the data line. 充分体现CAN控制器的地址和数据线时分复用的特点,解决了它与DSP的地址线和数据线分离之间所存在的问题。
Thirdly, the paper introduced character and theory and structure and configuration of master serial program to FPGA. Then it explained main functions of FPGA in motion controller, that is, it fed back actual moving position of motor and decoded system's address. 分析FPGA的特点、原理与结构、程序下载到芯片的配置及FPGA在运动控制器中的主要功能,即通过光栅尺计数来反馈电机的实际运动位置和系统的地址译码、片选功能;
In the design of the smart home management system, house intelligent controller-E house gateway technology-is presented. Its communication approach and network address transformation ( NAT) are studied, and communication protocol is designed and implemented. 在家居智能化系统的设计中,围绕家庭智能控制器&e家网关,着重分析了系统的通信实现方案,对网络地址转换(NAT)进行了分析与研究,设计并实现了通信协议。
The attributions of test controller such as communication address, input mode can be modified with the keyboard. 测试控制器的一些属性如通信地址、输入方式、测试成绩查询、内部实时时钟的调整、管理员密码修改等可以通过键盘进行配置。
Through the program of microprocessor in the node circuit, the intelligent node which is mainly composed of microprocessor and programmable CAN controller can set working way, ID address, Baud rate and so on, to achieve the receiving and sending of the network information. 智能节点能通过节点电路中的微处理器对CAN控制器编程设置工作方式I、D地址、波特率等参数,实现对网络上的信息接收和发送,他主要由微处理器和可编程的CAN控制器组成。
The specially designed magnetic drum controller allows the Chinese fonts on the drum to be retrieved not by drum address but by character codes match. 专门设计的磁鼓控制器不采用通常的寻址方式,而用按字模码搜索读鼓的方式取出汉字字模。
Mainly it includes SCADA/ OPS system and the brief analysis, including PLC/ RTU/ LED and so on for controller hardware constitution and frame composition, conventional mailing address and its characteristic comparison. 主要包括SCADA/OPS系统及简要分析,包括由PLC/RTU/LEP等为控制器的硬件构成及框架组成,常规的通信方式及其特点比较;
DMA controller has dedicated on-chip address bus and data bus for DMA transfers, which are controlled DMA register. DMA有专用的片内地址和数据总线,所有DMA访问都通过DMA的专用总线,并且由DMA控制器控制。
The Design of Main Memory Controller for High Bandwidth Based on Memory Disambiguation, Memory Reference Scheduling and Address Remapping 基于主存访问相关解决等技术的高带宽主存控制器设计
The tested results indicate that the SDRAM controller successfully operate the SDRAM with proper timing relation between address, data and control signal. 测试结果证明设计的SDRAM控制器成功地实现了对SDRAM的读写操作,地址、数据、控制信号时序匹配,满足了系统设计要求。
The device adopts PSD new technology, realizing circuits design more conventional than before, such as I/ O reestablishment, controller address extension, outside chip selection, DSP interruption by logical combination, etc. 装置设计采用单片机现场可编程外围芯片PSD新技术,实现了以往较为复杂的I/O重建、扩展控制器地址空间、外部芯片选择、逻辑组合DSP中断等电路设计。
This dissertation mainly focuses on the performance of off-chip memory system. It introduces how to model SDRAM controller in C language, analyzes the impact of open page and bank interleave, and evaluates the effect of page hit and bank interleave by different address mapping manner. 本文主要讨论龙芯2号片外存储系统性能,介绍了SDRAM控制器的建模方法,分析了OpenPage和bankinterleave对系统性能的影响,评价了不同地址映射方式对page命中和bankinterleave的影响。
The high speed write is realized by generating high speed write timing in controller, controlling address in decoder, and storing data in write/ read driver. 通过在控制电路中产生高速写脉冲,在译码电路控制地址,在读写驱动电路暂存数据实现了高速写。